1) Probably the most popular project right now addresses printed circuit robustness and reliability, especially in lead free assembly. Emphasis is here on non-obvious damage, things that you might miss but which may come back to haunt you. We have identified a number of such things. This work is a natural continuation of many years of studies of the reliability of microvias, work that has always been of great interest to members. We have developed a detailed manual on how to test PCBs, what to test for and what to look for and how, especially in terms of issues not commonly addressed by suppliers, etc.

2) Along with this, we continue to add to a major data base on the performance of various PCB materials and designs, including structures ranging from flex and 2-layered to 32-layered boards. Right now this rapidly growing data base lists detailed results on 58 different test vehicles/materials and is directly accessible to our members as a 'live' document on an ongoing basis.

3) This leads us right on to damage of assemblies under mechanical loads, say in ICT testing (bending), drop, vibration, etc. As in other areas we focus on understanding what can happen in actual applications, rather than just standardized testing. For soldered assemblies this requires us to address competing damage mechanisms affecting the solder, the intermetallic structures on the solder pads, and the bond between the pads and the underlying board. We have established an understanding of pad failure, i.e. delamination or 'cratering' under various loads, that allow us to generalize previously confusing experimental results on this for various designs and materials. We are in the process of tying that together with the parallel damage to solder and intermetallics for reliability assessment.

4) We have developed methods for simulating damage in drop testing, as well as bend testing, of assemblies by testing of individual solder bumps instead (without the need to assemble). We are also starting to do drop testing at low temperatures, and keep soliciting our members for suggestions to which temperatures are of realistic interest to them. So far the lowest requested has been -50°C, but we anticipate having to go lower eventually.

5) A major effort over the last 1.5 years has been focused on the so-called Kirkendall voiding in Cu₃Sn intermetallic layers (indications are that it is not actually Kirkendall voiding in the conventional sense). We have developed protocols for screening of Cu in terms of this phenomenon, including the way to tailor the test to the service conditions of actual concern. We have also developed a tool to be used by the PCB supplier to optimize his plating process on an ongoing basis in this respect. Finally, in-depth mechanistic studies have been complicated by the variability of the whole phenomenon, but we have identified a series of very reproducible samples with different propensities for voiding. This has allowed a very systematic study which we believe is on the way to identifying the root cause of the problem.

6) We have now started similar in-depth studies of the so-called 'missing ball' phenomenon encountered when soldering with SAC to Ni/Au, as presented among other two years ago by your company and now increasingly reported by others. We are also addressing the so-called 'champagne voids' often encountered with immersion Ag.

7) Very popular with our members is the fact that we are testing a range of current and 'new' lead free alloys, mostly SAC but also SAC 'doped' with additional elements, in both thermal cycling and mechanical testing. Most of our members have little influence on the choice of alloy and will have to assemble with a range of alloys in one reflow. More than anything they want to avoid serious 'surprises'.

8) This ties directly in with our long term studies of lead free metallurgy. We have established an in-depth mechanistic picture of the nature of the various alloys, effects of variations, etc., that allows us to make predictions of behavior to expect, of new parameters to control, of things to test for, and of how to organize experimental results, etc. Some members are finding our tutorial write-up on this extremely useful in, among other, failure analysis as well.

9) 'Backward compatibility': Many of our members have a particularly urgent need to understand the consequences of relatively low reflow temperatures when using SnPb paste to solder area components with lead free balls. We have established a considerable data base on both thermal cycling and mechanical testing, including the many interacting parameters that affect results. There is no doubt that low temperatures can lead to real trouble, especially because they often seem to work fine unless you test a lot of samples. Further complicating matters is that 'preferred' temperatures seem to be different depending on what type of loading you are concerned with. However, we have developed special processes that allow for relatively low peak temperatures and still ensure the best achievable reliability.

10) Probably of less importance to you, we have also established a dependence of lead free solder alloys on thermal cycling parameters that is of great concern to many. Right now, the only way to avoid seriously misleading results (such as concluding that SAC joints are more reliable than SnPb under thermal excursions unless service temperatures are extreme) is to use modified tests that take much too long to be practical for most applications. In general, our goal is to help minimize the cost and duration of reliability testing. In the present contest we are doing that by quantifying the dependence on test parameters so results of practical tests can be corrected. Our systematic understanding of the solder (above) predicts interactive dependencies on a range of parameters, making this a gigantic project which will go on for a while, but we already have considerable systematic results.

11) A subset of our members who are particularly focused on concrete guidelines for use in manufacturing have been happy with our 'cook-book' on BGA and CSP assembly repair, especially as it applies to lead free.

12) Another ongoing project that has already led to a manual of considerable interest to our members addresses CSP and BGA 'underfilling'. This includes approaches to improve mechanical robustness, notably in drop, but also thermal cycling resistance, by regular and partial underfilling, no-flow underfill assembly, corner bonding only and bonding with pre-applied adhesives at the corners. The plethora of approaches, the often complex dependencies on package and substrate mechanics, and the need to often balance mechanical and thermal cycling loading concerns makes this a complex issue and we keep updating our recommendations.

One of the most popular tools over the years has been our 'assembly yield' modeling software which has been widely used for predictions, design and process optimization. This was eventually incorporated in a complete 'codification software' package which includes a reliability module, a warpage predictor, and a routing module.

13) Our reliability module is based on a large experimental data base covering solder joint fatigue results for a great range of BGAs, CSPs and other components. This has been broadly used for predicting reliability test results, notably in terms of sensitivity to materials and design parameters. In fact the data base was so popular that we were approached by CALCE and offered access to their complete reliability prediction software for all our members in return for access to our data. Encouraged by our members we agreed to this, but CALCE ended up not having the resources to take advantage of our data (our members still got the access to their reliability software).

Over the years we have been 'first' on, or part of the efforts to first resolve, a series of issues that by now may seem mundane and for which many others claim to have been first.

14) A number of groups contributed to the understanding of the 'embrittlement' of SnPb solder joints on electrolytic Ni/Au pads, but we were ahead of the published efforts. More importantly, we were the ones to develop a simple method of predicting the life (quantitatively) for given joint parameters and service conditions. This was extremely well received by members.

15) Back in the mid-90s we developed a mechanistic understanding of stencil printing and the data to make quantitative predictions. Importantly, because we had a hard time getting flip chip test vehicles we developed a wafer bumping process that was subsequently transferred to leading commercial companies for manufacturing.

16) I don't know how concerned you are with flip chip right now? We started systematic work on this in 1994, and have continued ever since. For years this was a major reason for Motorola, IBM, TI, and Delco to be members. They all did serious work themselves, but used us as a 'sanity check' and discussion partner, as well as taking advantage of our flexibility in prototyping and experimentation. Since then the industry has changed, and even the large companies often count on us to do work to complement (rather than duplicate) theirs. We have developed a comprehensive understanding of flip chip assembly and reliability, including the validity and interpretation of various tests, as well as the complex materials and process interactions unique to flip chip. Importantly, we were instrumental in reminding the community that current modeling approaches do not allow meaningful reliability prediction. For many years we were the de facto 'screening' place for new underfill materials, as well as the place for underfill suppliers to learn how to develop better products. We now maintain and update detailed guidelines on equipment and materials selection, design, process development and preparation for future failure analysis, as well as testing and FA. All of this continues to be extremely popular with members whenever they decide/need to go to flip chip -- but we have also just had a new request to help IBM resolve serious fundamental flip chip issues that we have detailed experience with.

17) Our systematic work on BGA and CSP components and assembly has of course been of more immediate relevance to the majority of our members. Over the years we characterized a large range of components and their reliability, and developed detailed FEM models for reliability prediction. Along with that we characterized relevant tools and their use. At the time this was considered immediately relevant and important.

18) We were also the first to develop a systematic understanding of flip chip die cracking and its dependence on assembly parameters. This is one of those thngs that look trivial in retrospect but was critical to a number of people at the time.

19) The same can be said for a simple method we developed for the cheap and easy measurement of component warpage at reflow temperature (of particular relevance in yield prediction).

20) In general, our ongoing characterization of fluxes, solder pastes, conductive adhesives, and underfills have always been popular with our members.